ESD Design Expert

About the role

The ACC CTO ESD/EMC Team at NXP drives robustness excellence across the product portfolio. As an ESD Design Expert you will lead the definition and deployment of advanced ESD protection solutions for automotive and industrial semiconductor products.

Key responsibilities

• Define and drive ESD protection strategies, architectures, and roadmaps for new product families and emerging technologies.
• Lead design, optimization, and validation of on‑chip ESD protection for analog, mixed‑signal, high‑voltage, and automotive ICs.
• Establish ESD design methodologies, rules, best practices, and reusable libraries across the organization.
• Provide technical leadership during product development to ensure First‑Pass‑Right robustness while balancing performance, area, power, and cost.
• Drive ESD sign‑off reviews, investigations, characterization campaigns, failure analysis, and root‑cause assessments.
• Collaborate with EMC experts, technology development teams, and package engineering to create holistic robustness solutions.
• Develop advanced simulation, modeling, automation, and AI‑assisted methodologies to improve design efficiency.
• Mentor and coach design engineers, and act as technical interface for customer escalations.

Required profile

• Master's or Ph.D. in Electrical Engineering, Microelectronics, Semiconductor Physics or related field.
• 10–20 years of experience in ESD protection design or analog/mixed‑signal IC design.
• Deep expertise in semiconductor device physics and analog integrated circuit design.
• Proven track record developing ESD solutions for high‑voltage, power‑management, automotive or communication ICs.
• Experience leading technical projects and influencing cross‑functional teams.

Required skills

• ESD protection design
• Analog and mixed‑signal IC design
• High‑voltage and power‑management circuit design
• Semiconductor device physics
• Knowledge of ESD standards (HBM, CDM, IEC 61000‑4‑2, ISO 10605, TLP, VF‑TLP)
• EDA simulation tools and device modeling
• Silicon debug and failure analysis
• CMOS, BCD, SOI, FinFET processes