Senior Digital IC/ASIC Design Engineer

About the role

We are looking for a Senior Digital IC/ASIC Design Engineer to join a global technology organisation developing secure embedded solutions for safety‑critical applications. The role involves full‑cycle digital design of complex SoC blocks within a collaborative R&D environment.

Key responsibilities

• Design and develop RTL for complex digital logic using Verilog/SystemVerilog/VHDL.
• Integrate and verify digital IP and SoC components.
• Conduct product feasibility studies and define architecture.
• Create verification environments and test methodologies.
• Perform design analysis, debugging, and silicon validation.
• Collaborate closely with analogue, physical implementation, software and test teams.
• Drive continuous improvement of design and verification processes.

Required profile

• Proven experience in digital IC or ASIC development.
• Strong background in RTL design, integration and verification of SoC devices.
• Ability to work on technically challenging projects in a secure R&D setting.
• Experience with secure hardware or embedded security is a plus but not mandatory.

Required skills

• Verilog, SystemVerilog, VHDL
• RTL simulation and digital verification
• Synopsys and/or Cadence design tools
• Static Timing Analysis, Logical Synthesis, Equivalence Checking
• Python scripting
• TCL scripting

What we offer

• €70,000–€80,000 basic salary
• Up to 10% annual bonus
• Permanent contract
• Long‑term R&D projects on cutting‑edge technology
• Collaborative team of experienced engineers