Postdoctoral Researcher – Ferroelectric Ternary Computing

About the role

The Institut des Nanotechnologies de Lyon (INL) seeks a post‑doctoral researcher to advance ferroelectric‑based ternary computing, covering everything from circuit design to system‑level integration. The work targets energy‑efficient in‑memory computing solutions for AI and signal‑processing workloads.

Key responsibilities

• Design a standard‑cell library based on FeFET devices for use in synthesis flows.
• Develop and optimise ternary arithmetic units (MACs, adders, comparators) targeting area, power and timing closure.
• Create system‑level models of FeFET‑based ternary IMC units and integrate them into architecture simulators.
• Investigate hardware/software co‑design strategies for mapping CNNs and DSP kernels onto the ternary fabric.
• Benchmark energy, performance and accuracy trade‑offs against binary CMOS and NVM‑based IMC implementations.
• Contribute to a design methodology, including EDA tool flows, cell library characterisation guidelines and design rules.

Required profile

• PhD in microelectronics, computer architecture or a closely related field.
• Strong expertise in digital circuit design flows and hands‑on experience with industrial EDA tools (Cadence Virtuoso/Spectre, Synopsys).
• Solid knowledge of non‑volatile memory devices, preferably ferroelectric (FeFET, FeCap) or resistive memories (RRAM, PCM).
• Experience with architecture‑level simulation frameworks and hardware/software co‑design methodologies.
• Familiarity with deep‑neural‑network inference or digital‑signal‑processing workloads.
• Proficiency in HDL (Verilog, VHDL, Verilog‑A) and scripting languages (Python, Shell).
• Scientific leadership, strong publication record and excellent English communication skills.

Required skills

• Cadence Virtuoso/Spectre
• Synopsys EDA tools
• Standard‑cell library characterisation
• FeFET / FeCap device knowledge
• RRAM and PCM familiarity
• Compact device modelling
• Architecture‑level simulation frameworks
• RISC‑V ecosystem awareness
• Verilog, VHDL, Verilog‑A
• Python programming
• Shell scripting