Senior Hardware Design Engineer

About the role

Arago is seeking a Senior Hardware Design Engineer to create and verify custom digital hardware components that power its high‑performance AI/ML compute units. Based in Paris, you will work on cutting‑edge multiphysics computation architectures and collaborate closely with system software and architecture teams.

Key responsibilities

• Design, implement and verify RTL blocks for memory, control and compute subsystems of Arago’s custom tensor unit.
• Define block‑level specifications together with system‑software and architecture groups.
• Develop and maintain functional verification infrastructure, including testbenches, assertions and coverage metrics.
• Support synthesis, timing analysis and backend integration alongside physical‑design and CAD engineers.
• Participate in architectural exploration and hardware‑software co‑design for future platform iterations.

Required profile

• Extensive experience in RTL design for control logic, datapaths, memory subsystems and specialized processing units.
• Strong grasp of digital architecture concepts such as pipelining, arbitration and memory hierarchy.
• Proficiency in functional verification, testbench development and debugging; UVM experience is a plus.
• Familiarity with ASIC and FPGA design flows, including synthesis, timing closure and DFT.
• Fluent English; French is a plus.

Required skills

• Verilog / SystemVerilog
• UVM (or similar verification methodology)
• ASIC design flow
• FPGA design flow
• Synthesis and timing closure
• Design‑for‑test (DFT)
• Digital architecture (pipelining, arbitration, memory hierarchy)

What we offer

• Competitive cash compensation based on location and experience.
• Early‑stage stock option plan.
• Opportunity to work on groundbreaking AI‑hardware at a fast‑growing deep‑tech company.